SN74HC164N PDIP-14 Counter Shift Register IC (Pack of 3 ICs)

An asynchronous clear (CLR) input and AND-gated serial inputs are two features of the 8-bit parallel-out Serial Shift Register SN74HC164N. Complete control over incoming data is possible with the gated serial (A and B) inputs; a low at either input prevents additional data from entering and resets the first flip-flop to the low level at the subsequent clock (CLK) pulse. The other input, which affects the state of the first flip-flop, is enabled by a high-level input. When CLK is high or low, data at the serial inputs can be modified as long as the minimal setup time criteria are satisfied. On the CLK low-to-high-level transition, clocking takes place.

Features: 

• Up to 10 LSTTL loads can be driven by the outputs.
• Completely buffered serial and clock inputs
• Applications: Communications & Networking, Consumer Electronics, Imaging, Video & Vision
• Direct, unambiguously green product; no SB/BR